SPICE-Like Simulators Part 1: Modified Nodal Analysis

This series of articles provides an introduction to the methods used by SPICE-like Time-Domain (transient analysis) simulators which include almost all open-source and commercially available signal integrity tools. It is based on research and analysis performed during the creation of eispice. This set of articles do not provide any information on the history of SPICE. For that you can look to wikipedia. These articles also don't provide any details on SPICE usage. For that you can look to the Spice3f5 User's Manual.

I define SPICE-like simulators as the set of simulators that use Modified Nodal Analysis (MNA), a Sparse Matrix Solver, Trapezoidal, Backwards Euler, and/or Gear Numerical Integration, and Newton-Raphson Linearization. MNA was introduced in SPICE 3f5. Not all simulators use it but since eispice uses MNA that's what's covered in this article.

Straight-forward Nodal Analysis is extensively covered in most second year Electrical Engineering programs, but here's a little refresher in the form of a simple example. One thing to remember is that nodal analysis assumes that all devices are ideal resistors. Turning other devices like capacitors and inductors into resistors at each time point is covered in later articles.

Given the circuit:


         Va  R2    Vb
         .--/\/\/\--o------.
         |          |      |
         /          /      |
         \R1        \R3   /_\Ix
         /          /    (/ \)
         \          \     \ /
         |          |      |
         |          |      |
        ===        ===    ===
        GND        GND    GND
                                        

We want to solve for Va and Vb. Using the fact that the sum of all currents into each node is zero (Kirchoff's Law) we can write two equations and solve for the two unknowns (Vgnd = 0V but is included for clearness):

  1. (1/R1)(Va-Vgnd) + (1/R2)(Va-Vb) = 0
  2. (1/R2)(Vb-Va) + (1/R3)(Vb-Vgnd) - Ix = 0

The circuit equations can be rearranged (also now setting Vgnd = 0) to become:

  1. Va(1/R1+1/R2) + Vb(-1/R2) = 0
  2. Va(-1/R2) + Vb(1/R2+1/R3) = Ix

These equations can be converted into matrix form; Ax=b, and then solved using a matrix solver. Since most circuits will result in nodes that don't connect to many devices a sparse matrix solver can be used, like SuperLU (used in eispice), Sparse (used in Berkley Spice3f5), KLU, or others. Keep in mind that the purpose for MNA analysis is to transfer circuit equations into a deterministic format that can be solved by a computer. For instance, the matricides for the above circuit become:


         __                       __   _  _     _  _
        |  1/R1 + 1/R2   -1/R2      | | Va |   | 0  |
        |__-1/R2          1/R2+1/R3__| |_Vb_| = |_Ix_|
                                        

We can enter any values for R1, R2, R3, and Ix and solve for Va and Vb.

So far this article has just explored Nodal Analysis, which can solve for voltages given resistors and current sources but what about voltage sources, and current though devices? That's where the Modified part of MNA comes in. The above circuit can be modifies to include a voltage source Vx:


         Va  R2    Vb
         .--/\/\/\--o-----.
         |          |     |
         /          /     |   /|\
         \R1        \R3  /+\Vx |
         /          /   (   )  |Ix
         \          \    \-/   |
         |          |     |    |
         |          |     |
        ===       ===   ===
        GND       GND   GND
                                        

The circuit equations now include 3 unknowns (node voltages and current Ix) so a new equation fixing Vb to Vx is added:

  1. (1/R1)(Va-Vgnd) + (1/R2)(Va-Vb) = 0
  2. (1/R2)(Vb-Va) + (1/R3)(Vb-Vgnd) - Ix = 0
  3. Vb = Vx

They can be rearranged as, (setting Vgnd = 0):

  1. Va(1/R1+1/R2) + Vb(-1/R2) = 0
  2. Va(-1/R2) + Vb(1/R2+1/R3) + Ix = 0
  3. Vb = Vx

Which becomes:


         __                        __   _  _     _  _
        | 1/R1 + 1/R2  -1/R2      0  | | Va |   | 0  |
        | -1/R2         1/R2+1/R3  1  | | Vb | = | 0  |
        |_0            1          0__| |_IX_|   |_Vx_|
                                        

By setting Vx, R1, R2, and R3 the matrix solver can be used to calculate Va, Vb (which is set to Vx), and Ix. Notice that by inserting a zero volt source in series current can be measured between any two nodes.

A computerized circuit solver (SPICE) doesn't start by writing nodal equations and converting them into a matrix. Each device has an MNA Stamp which is directly inserted into the impedance matrix (A) and the fixed source matrix (b, also called the right-hand-side matrix, RHS). Each voltage node and voltage source has a row/column pair and a slot in the RHS matrix, for instance in the above circuit Va “owns” row 1, column 1 and slot 1, Vb “owns” row 2, column 2 and slot 2, etc.. Each device is provided with pointers to locations in the matrix that it effects. For instance R2 would have pointers to all of the slots in the A matrix where Va and Vb rows and columns cross (4 spots). That way a device doesn't have to have knowledge of the entire circuit, just the nodes it effects.

The MNA Stamps for basic devices follow, more stamps can be found in the QUCS Technical Papers. The next part of this article will explore how a SPICE Simulator converts inductances and capacitances into impedances and voltage sources that can be stamped onto an MNA Matrix (Numerical Integration).

Resistor MNA Stamp:


          |_Vk_Vj_|             + G=1/R  -
        k | G  -G |             --/\/\/\--
        j |-G   G |             k        j
                                        

Capacitor MNA Stamp:


                              +    Gn    -
          |_Vk__Vj_|_rhs_|    +--/\/\/\--+
        k | Gn -Gn | Ieq |  k_|    __    |_j
        j |-Gn  Gn |-Ieq |    |__ /  \___|
                                  \__/
                                  Ieq
                                        

Inductor MNA Stamp:


          |_Vk_Vj_Ir_|_rhs_|
        k | -- --  1 | --  |  +    /\    Rn    -
        j | -- -- -1 | --  |  k__ /  \__/\/\/\__j
        r | 1  -1 -Rn|-Veq |      \  /
                                   \/ Veq
                                        

Current Source Stamp:


                            +  __  -
          |_Vk_Vj_|_rhs_|   __/  \__
        k | -- -- | -Ir |   k \__/ j
        j | -- -- |  Ir |   -------> Ir
                                        

Voltage Source Stamp:


                               +  /\  -
          |_Vk_Vj_Ir_|_rhs_|   __/Vr\__
        k | -- --  1 | --  |   k \  / j
        j | -- -- -1 | --  |      \/
        r | 1  -1 -- | Vr  |   -------> Ir